1. Field of the Invention
This invention relates generally to semiconductor processing, and, more particularly, to determining a root cause of a statistical process control failure during semiconductor processing.
2. Description of the Related Art
To fabricate a semiconductor device, a wafer is typically processed in numerous processing tools in a predetermined sequence. The processing tools may include photolithography steppers, etch tools, deposition tools, polishing tools, rapid thermal processing tools, implantation tools, and the like. Each processing tool modifies the wafer according to a particular operating recipe. For example, a photolithography stepper may be used to form a patterned layer of photoresist above the wafer. Features in the patterned layer of photoresist correspond to a plurality of features, e.g. gate electrode structures, which will ultimately be formed above the surface of the wafer. The tool sequence, as well as the recipes used by the tools, must be carefully controlled so that the features formed on the wafer meet appropriate design and performance criteria. Thus, statistical process control (SPC) systems are often used to coordinate operation of the processing tools.
In operation, the conventional SPC system initiates a control script based upon a manufacturing model, which can be a software program that automatically retrieves data needed to execute a manufacturing process, and transmits one or more control messages, such as an operating recipe, to the processing tools. The conventional SPC system may also provide control messages that are used to dispatch wafers or wafer lots to the processing tools, which may process the wafers or wafer lots according to the operating recipe. The processing tools may include one or more sensors to collect data associated with operation of the processing tool. For example, an etching tool may include a sensor to monitor the radio frequency power delivered by the etching tool. The data acquired by the various sensors may be referred to as tool trace data. Wafer state data indicative of the physical state of one or more wafers may also be collected by various devices within the SPC system. For example, one or more metrology tools may be used to perform measurements on selected wafers after they have been processed by one or more processing tools. The measurements may include measurements of a thickness of a layer of material formed on the wafer, a critical dimension (CD) of one or more features formed on the wafer, and the like.
The collected tool trace data and/or wafer state data, as well as other types or data, may be provided to the SPC system, which may use the collected data for various purposes such as fault detection and/or classification. An SPC fault (or failure event) occurs when one or more measurements are outside the control limits for a particular measurement point. For example, the tool trace data collected by a thermocouple in a rapid thermal anneal tool may indicate that the temperature within the tool has dropped below a desired temperature threshold, indicating a possible SPC fault. For another example, the wafer state data collected by a metrology tool may indicate that a mean critical dimension of one or more features exceeds a desired threshold value for the mean critical dimension, indicating a possible SPC fault.
Fabrication facilities typically operate in or near a steady state condition, and so many wafers or wafer lots may be processed by the same sequence of processing tools according to the same recipe. An SPC fault may therefore affect many wafers if it is not detected and corrected quickly. However, the data collected by conventional APC systems may not expedite the detection of a root cause of an SPC fault, at least in part because the SPC system typically runs in the steady state and so may continue to process wafers or wafer lots according to the same processes that led to the SPC fault. Consequently, little or no new information related to the SPC fault may be produced by the convention SPC system. Engineers may shut down portions of the fabrication process to perform tests that may be used to determine the root cause, but this laborious and time-consuming approach may lead to undesirable down-time that may reduce the efficiency of the fabrication facility.
The present invention is directed to addressing the effects of one or more of the problems set forth above.